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root/cvsroot/UserCode/MitAna/TreeMod/src/L1Mod.cc
Revision: 1.4
Committed: Wed Dec 2 20:27:42 2009 UTC (15 years, 5 months ago) by loizides
Content type: text/plain
Branch: MAIN
CVS Tags: Mit_032, Mit_031, Mit_025c_branch2, Mit_025c_branch1, Mit_030, Mit_029c, Mit_029b, Mit_030_pre1, Mit_029a, Mit_029, Mit_029_pre1, Mit_028a, Mit_025c_branch0, Mit_028, Mit_027a, Mit_027, Mit_026, Mit_025e, Mit_025d, Mit_025c, Mit_025b, Mit_025a, Mit_025, Mit_025pre2, Mit_024b, Mit_025pre1, Mit_024a, Mit_024, Mit_023, Mit_022a, Mit_022, Mit_020d, TMit_020d, Mit_020c, Mit_021, Mit_021pre2, Mit_021pre1, Mit_020b, Mit_020a, Mit_020, Mit_020pre1, Mit_018, Mit_017, Mit_017pre3, Mit_017pre2, Mit_017pre1, Mit_016, Mit_015b, Mit_015a, Mit_015, Mit_014e, Mit_014d, Mit_014c, Mit_014b, Mit_014a, Mit_014, Mit_014pre3, Mit_014pre2, Mit_014pre1, Mit_013d, Mit_013c, Mit_013b, Mit_013a, Mit_013, Mit_013pre1, Mit_012i, Mit_012h, Mit_012g, Mit_012f, Mit_012e, Mit_012d, HEAD
Branch point for: Mit_025c_branch
Changes since 1.3: +4 -4 lines
Log Message:
Updated L1 mask to 128 bits

File Contents

# Content
1 // $Id: L1Mod.cc,v 1.3 2009/12/01 15:14:11 loizides Exp $
2
3 #include "MitAna/TreeMod/interface/L1Mod.h"
4 #include <TFile.h>
5 #include <TTree.h>
6 #include "MitAna/DataTree/interface/Names.h"
7 #include "MitAna/DataTree/interface/L1TriggerMask.h"
8 #include "MitAna/DataTree/interface/TriggerName.h"
9 #include "MitAna/DataTree/interface/TriggerTable.h"
10
11 using namespace mithep;
12
13 ClassImp(mithep::L1Mod)
14
15 //--------------------------------------------------------------------------------------------------
16 L1Mod::L1Mod(const char *name, const char *title) :
17 BaseMod(name,title),
18 fAbort(kTRUE),
19 fPrintTable(kFALSE),
20 fIgnoreBits(kFALSE),
21 fBitsName(Names::gkL1TechBitsBrn),
22 fBits(0),
23 fTriggers(0),
24 fNEvents(0),
25 fNAcceped(0),
26 fNFailed(0)
27 {
28 // Constructor.
29 }
30
31 //--------------------------------------------------------------------------------------------------
32 L1Mod::~L1Mod()
33 {
34 // Destructor.
35 }
36
37 //--------------------------------------------------------------------------------------------------
38 void L1Mod::AddTrigger(const char *expr)
39 {
40 // Add trigger search pattern to the list of patters. Each element of the list is logically
41 // "ored". The given expression can contain several trigger names logically "anded" (using "&").
42 // A "!" infront of a trigger name negates the bit. For example, valid expressions are:
43 // "A", "!A", "A&B", "A&!B" or "A&B&C"
44
45 string tname(expr);
46 fTrigNames.push_back(tname);
47 }
48
49 //--------------------------------------------------------------------------------------------------
50 void L1Mod::BeginRun()
51 {
52 // Get L1 tree and set branches. Compute bitmasks to be used when comparing to the L1 bits.
53
54 fTrigBitsAnd.clear();
55 fTrigBitsCmp.clear();
56
57 if (fPrintTable)
58 fTriggers->Print();
59
60 for (UInt_t i=0; i<fTrigNames.size(); ++i) {
61 BitMask128 tmask; //trigger mask
62 BitMask128 amask; //bitand mask
63 TString names(fTrigNames.at(i).c_str());
64
65 TObjArray *arr = names.Tokenize("&");
66 if (arr) {
67 for(Int_t j=0; j<arr->GetEntries(); j++){
68 TObjString *s = dynamic_cast<TObjString*>(arr->At(j));
69 if (!s)
70 continue;
71 const char *sptr = s->GetString().Data();
72 Bool_t invert = kFALSE;
73 if (sptr[0] == '!') {
74 invert = kTRUE; //inverted bit set
75 ++sptr;
76 }
77 const TriggerName *tn = fTriggers->Get(sptr);
78 if (!tn) {
79 Warning("BeginRun", "Trigger %s not found.", sptr);
80 continue;
81 }
82
83 UShort_t bit = tn->Id();
84 if (amask.TestBit(bit)) {
85 if (tmask.TestBit(bit)==invert) {
86 amask.ClearBit(bit);
87 tmask.ClearBit(bit);
88 Warning("BeginRun", "Trigger expression %s always false.", names.Data());
89 break;
90 }
91 } else { //always set and-mask bit
92 amask.SetBit(bit);
93 if (!invert)
94 tmask.SetBit(bit); //set trigger bit
95 }
96 }
97 delete arr;
98 }
99 if (amask.NBitsSet()) {
100 fTrigBitsAnd.push_back(amask);
101 fTrigBitsCmp.push_back(tmask);
102 }
103 }
104 }
105
106 //--------------------------------------------------------------------------------------------------
107 void L1Mod::Process()
108 {
109 // Process trigger bits for this event. If trigger bits pass the given bit mask, then obtain
110 // and publish the corresponding trigger objects. If OnAccepted or OnFailed is implemented
111 // in a derived class, call it. Do not stop processing this event, if fAbort is kFALSE.
112
113 ++fNEvents;
114 LoadBranch(fBitsName);
115
116 // match trigger bits to trigger mask
117 fBitsDone.Clear();
118 Bool_t accept = kFALSE;
119 for (UInt_t i = 0; i<fTrigBitsAnd.size(); ++i) {
120 BitMask128 bitmask(fBits->Get());
121 bitmask &= fTrigBitsAnd.at(i);
122 if (bitmask==fTrigBitsCmp.at(i)) {
123 accept = kTRUE;
124 }
125 }
126
127 // take action if failed
128 if (!accept) {
129 ++fNFailed;
130 OnFailed();
131 if (fAbort) {
132 SkipEvent(); // abort processing of this event by sub-modules
133 }
134 return;
135 }
136
137 // take action if accepted
138 ++fNAcceped;
139 IncNEventsProcessed();
140 OnAccepted();
141 }
142
143 //--------------------------------------------------------------------------------------------------
144 void L1Mod::SlaveBegin()
145 {
146 // Request trigger bit branch and obtain trigger table and objects.
147
148 ReqBranch(fBitsName, fBits);
149
150 if (fBitsName.Contains("Algo"))
151 fTriggers = GetL1AlgoTable();
152 else
153 fTriggers = GetL1TechTable();
154
155 if (!fTriggers) {
156 SendError(kAbortAnalysis, "SlaveBegin", "Could not get L1 trigger table.");
157 return;
158 }
159 }
160
161 //--------------------------------------------------------------------------------------------------
162 void L1Mod::SlaveTerminate()
163 {
164 // Save number of accepted events.
165
166 SaveNEventsProcessed("hDL1Events");
167 }