6 |
|
to meet stringent quality requirements. Few important problems have been spotted and |
7 |
|
solved.\\ |
8 |
|
During the TIB/TID integration all the operations have been monitored step by step by a chain of tests |
9 |
< |
aimed at a final control of the components just after the installation described here and at a verification of the |
10 |
< |
shell overall quality and functionality (~\ref{burnin}). The step by step tests are of particular importance |
9 |
> |
aimed at a final control of the components just after the installation described here. |
10 |
> |
A verification of the |
11 |
> |
shell overall quality and functionality in conditions similar to the final ones |
12 |
> |
has been later performed during the so-called burn-in tests~\cite{ref:burnin}. |
13 |
> |
The step by step tests are of particular importance |
14 |
|
because in most cases it is very difficult and in some cases even dangerous |
15 |
|
to replace a single faulty component when it is embedded in a fully equipped shell. |
16 |
|
|
45 |
|
\end{figure} |
46 |
|
|
47 |
|
\begin{description} |
48 |
< |
\item[TSC] The Trigger Sequencer Card or TSC~\cite{bib:specs:tsc} generate the |
48 |
> |
\item[TSC] The Trigger Sequencer Card or TSC~\cite{ref:tsc} generate the |
49 |
|
40~MHz clock for the entire system and triggers as well, either |
50 |
|
internally via software or by accepting external inputs. It has up to four |
51 |
|
electrical clock/trigger outputs, enough to drive the FEDs used during the |
52 |
|
integration, and an optical clock/trigger output for the FEC. |
53 |
|
The TSC may also generate the reset and calibration signal that are |
54 |
|
also encoded on the clock/trigger line.\\ |
55 |
< |
\item[FED] The analog-to-digital conversion is done by special PCI FEDs~\cite{bib:fedpci}, |
55 |
> |
\item[FED] The analog-to-digital conversion is done by special PCI FEDs, |
56 |
> |
%~\cite{bib:fedpci}, |
57 |
|
with electrical differential analog input, mounted on |
58 |
|
PCI carrier boards and installed in an industrial PC. |
59 |
|
The opto-electrical conversion of the analog signals coming from the module under test |
60 |
|
is done externally by a 24-channel unit. |
61 |
|
A setup containing 3 FEDs, with the electro-opical converter, is able |
62 |
< |
to readout 48 APV; this is equivalent to 12 single sided modules |
62 |
> |
to readout 48 APV25; this is equivalent to 12 single sided modules |
63 |
|
%(four complete strings) |
64 |
|
or four double sided modules assemblies. |
65 |
|
%(one string plus one module). |
66 |
|
These figures are |
67 |
|
pefectly suited for the tests during the integration.\\ |
68 |
< |
Since the readout of the data from the APVs is not |
68 |
> |
Since the readout of the data from the APV25s is not |
69 |
|
synchronous with the L1 trigger, a crucial capability of the FED is the |
70 |
|
\textit{header finding}, i.e. the automatical tagging of the |
71 |
< |
analog data stream from APV pairs with respect to the idle |
72 |
< |
signals at its inputs. This is possible since the APVs embeds the |
71 |
> |
analog data stream from APV25 pairs with respect to the idle |
72 |
> |
signals at its inputs. This is possible since the APV25s embeds the |
73 |
|
analogue data stream within a {\em digital frame} made up of a leading |
74 |
|
digital header and a trailing tick-mark. |
75 |
|
%The peculiarity of the PCI FED |
116 |
|
named daq.xml. It reflects the setup used for the test and has to be rarely changed |
117 |
|
during the integration procedures. The system settings uploaded, and |
118 |
|
read back for verification, by the FEC are contained into fec.xml. |
119 |
< |
The data decoding map (i.e., information needed to map each FED input to an APV |
120 |
< |
pair of a specific module) is written into module.xml. |
119 |
> |
The data decoding map (i.e., information needed to map each FED input to an |
120 |
> |
APV25 pair of a specific module) is written into module.xml. |
121 |
|
|
122 |
|
%\begin{description} |
123 |
|
%\item[Configuration of the DAQ hardware and software, daq.xml] The hardware |
173 |
|
FecProfiler is able to detect |
174 |
|
the devices connected to the CCUs and builds the fec.xml file needed by |
175 |
|
TrackerOnline. FecTool takes care of checking that thedetected devices |
176 |
< |
corresponds to expected ones, i.e., per module, 4 or 6 APVs, one |
176 |
> |
corresponds to expected ones, i.e., per module, 4 or 6 APV25s, one |
177 |
|
PLL, one AOH, and so on. ProgramTest allows the ring functionalities, |
178 |
|
i.e. the redundancy, to be deeply tested. |
179 |
|
|
248 |
|
in the PLLs delay registers. |
249 |
|
Doing so the different delays in the control and |
250 |
|
readout chain are compensated, the clock arrives to the modules |
251 |
< |
synchronously, with a skew of the order of a few ns, and the APVs |
251 |
> |
synchronously, with a skew of the order of a few ns, and the APV25s |
252 |
|
signal are properly sampled by the FEDs. This requires also the clock |
253 |
|
to all the FEDs to be synchronous, but this is guaranteed |
254 |
|
by using cables equal in length between the TSC and the FEDs.\\ |
255 |
|
The time alignment run uses the periodic tick mark signal issued by |
256 |
< |
the idle APVs every 70 clock cycles. The APV signals are sampled by FEDs in |
256 |
> |
the idle APV25s every 70 clock cycles. The APV25 signals are sampled by FEDs in |
257 |
|
scope mode, i.e. without waiting for an header but continously, |
258 |
|
sampling the inputs at the full clock frequency as with a 40~MSample/s |
259 |
|
scope. The measurement is repeated after all the PLL delays are |
260 |
|
increased by the minimum delay step, 25/24~ns. After 24 such cycles the |
261 |
< |
idle APV output and thus the tick mark signal also are measured with |
261 |
> |
idle APV25 output and thus the tick mark signal also are measured with |
262 |
|
an effective 960~MSample/s scope. |
263 |
|
\begin{figure} |
264 |
|
\centering |
268 |
|
during the time alignment an interval of $1\,\mu\mathrm{s}$ is scanned.} |
269 |
|
\label{fig:tick} |
270 |
|
\end{figure} |
271 |
< |
The time differences between the variuos APV tick marks are a |
271 |
> |
The time differences between the variuos APV25 tick marks are a |
272 |
|
measurement of the relative delays introduced by the connections and |
273 |
|
can be used to compute the optimal delay to be set on each PLL for compensation. |
274 |
|
The tick mark raising edge $t_R$ time is measured by taking the time corresponding to the highest |
307 |
|
\label{fig:gainscan_range} |
308 |
|
\includegraphics[width=.45\textwidth]{Figs/gainscan_range.pdf} |
309 |
|
} |
310 |
< |
\subfigure[A pictorial representation of a tick mark as produced by the APVs (dotted) |
310 |
> |
\subfigure[A pictorial representation of a tick mark as produced by the APV25s (dotted) |
311 |
|
and as transmitted by the lasers (solid) when the laser driver's bias is too |
312 |
|
low (left), correct (centre) or too high (right), with the subsequent signal saturation.] |
313 |
|
{ |
337 |
|
on the fibre and are investigated. |
338 |
|
\item[VPSP Scan.] |
339 |
|
This commissioning run is devoted to optimise the pedestal of |
340 |
< |
the APV, i.e. the average output level in absence of any signal, with |
340 |
> |
the APV25, i.e. the average output level in absence of any signal, with |
341 |
|
respect to the dynamical range of the FEDs. This level is managed by a |
342 |
< |
specific APV register, know as {\em VPSP}, which controls a voltage |
342 |
> |
specific APV25 register, know as {\em VPSP}, which controls a voltage |
343 |
|
setting within the deconvolution circuitry. The procedure consists of |
344 |
|
a scan of VPSP values while acquiring data frames from modules in the |
345 |
|
standard way. |
370 |
|
\label{fig:saturationnoise} |
371 |
|
\includegraphics[width=.45\textwidth]{Figs/saturation_noise.pdf} |
372 |
|
} |
373 |
< |
\caption{Pedestal (left) and noise (right) vs. strip number for a 6 APV module. |
373 |
> |
\caption{Pedestal (left) and noise (right) vs. strip number for a 6 APV25 module. |
374 |
|
The pedestals of strips after strip \#{}640 are low, approaching to the bottom of the |
375 |
|
dynamic range. Their noise is therefore altered with respect to the not saturated |
376 |
|
channels.} |
380 |
|
The VPSP scan is not sistematically performed during the integration, |
381 |
|
since the default VPSP setting is adequate in most of the |
382 |
|
cases. Nevertheless, VPSP optimal values change considerably within |
383 |
< |
the APV population and are strongly temperature dependent and is |
383 |
> |
the APV25 population and are strongly temperature dependent and is |
384 |
|
rather common to have a stuation in which the pedestal of few readout |
385 |
|
channels approaches to the lower edge of dynamic range |
386 |
|
(Fig.~\ref{fig:saturationpedestal}) resulting in a lower RMS (see |
393 |
|
Triggers are sent to the modules and FEDs work in ``header finding'' mode. |
394 |
|
All the analogue frames from the modules are collected two analyses |
395 |
|
are performed on these data: online, by the TrackerOnline |
396 |
< |
software; offline, in a way very similar to the final experiment by |
397 |
< |
using algorythms of the ORCA package~\cite{bib:orca}, the CMS |
398 |
< |
reconstruction package at that time, now replaced by CMSSW. |
396 |
> |
software; offline, in a way very similar to the final experiment algorythms. |
397 |
> |
%by using algorythms of the ORCA package~\cite{bib:orca}, the CMS |
398 |
> |
%reconstruction package at that time, now replaced by CMSSW. |
399 |
|
The average value of the signal read on each strip is an estimate of |
400 |
|
its pedestal, while the RMS is a good estimate of its noise, provided that the noise itself |
401 |
|
is Gaussian, which is true to a first approximation. This value is often referred to as |
402 |
|
\textit{raw noise}, as opposed to the \textit{common-mode subtracted |
403 |
|
noise} (or CMN). The latter is the RMS computed after having |
404 |
|
subtracted the {\em common noise}, i.e. the correlated noise-like fluctuation |
405 |
< |
common to a given group of channels (tipically an entire APV). |
406 |
< |
The common mode noise subtraction method implemented in ORCA and |
405 |
> |
common to a given group of channels (tipically an entire APV25). |
406 |
> |
The common mode noise subtraction method implemented in |
407 |
|
TrackerOnline is similar to that performed by the final FEDs.\\ |
408 |
|
Because of the difference in gain between the various |
409 |
< |
optical links, noise comparison between different APV pairs requires a |
409 |
> |
optical links, noise comparison between different APV25 pairs requires a |
410 |
|
normalization. This procedure relies on the digital |
411 |
< |
headers whose amplitude, being the same on each APV, is used to |
411 |
> |
headers whose amplitude, being the same on each APV25, is used to |
412 |
|
estimate of the relative gain of optical links so to apply an |
413 |
|
appropriate correction. In such a way noise and gain are |
414 |
|
simultaneously measured provided that the signal is not saturation both on low and high values. |
429 |
|
Figure~\ref{fig:noiseprofile} shows an example of the noise output: |
430 |
|
the normalised raw noise and CMN and the uncalibrated CMN |
431 |
|
for each strip are plotted against the strip index. The first 256 strips belong to the |
432 |
< |
first APV pair and are multiplexed to a single optical line and the strips from 257 to 512 |
433 |
< |
belong to the second APV pair. It can be noted here that the |
432 |
> |
first APV25 pair and are multiplexed to a single optical line and the strips from 257 to 512 |
433 |
> |
belong to the second APV25 pair. It can be noted here that the |
434 |
|
raw noise without normalisation reflecs the different gain of |
435 |
|
optical links, this is corrected by the normalisation procedure.\\ |
436 |
|
If validated by the user, data are packed along with |
522 |
|
Even in the most stressing condition and after a few minutes of settling, |
523 |
|
the highest measured temperature on the lasers was $\sim 40^\circ \mathrm{C}$ |
524 |
|
(while it was $48^\circ \mathrm{C}$ on the hybrid). |
525 |
< |
These are safe temperatures |
525 |
> |
These are safe temperatures~\cite{ref:lasertemp} |
526 |
|
thus the integration tests could be performed without problems. |