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\section{The Integration Components}
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\label{sec:Components}
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\subsection{The Silicon Module}
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The TIB and TID modules (table~\ref{table:modules})
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consist of a carbon fiber support
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frame that holds a single silicon
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sensor~\cite{ref:mask}\cite{ref:sensors} and the front-end electronics
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hybrid circuit~\cite{ref:hybrid}.
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These detectors are produced from individual, 320~$\mu$m thick, sensors.
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All silicon strip sensors are of the
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single-sided ``p-on-n'' type
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with integrated decoupling capacitors, aluminium readout strips
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and polysilicon bias resistors.
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The sensor is aligned with respect to the same frame
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aluminum inserts that are used to fix the module the ledges in such a
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way the sensor positioning is guaranteed with respect to the support
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structure~\cite{ref:assembly}.\\
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Double-sided detectors are built by simply assembling two independent
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single-sided modules (``R-Phi'' and ``Stereo'') back to back.
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The double-sided TIB layers and TID rings are equipped with module
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sandwiches capable of a space point measurement and obtained by
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coupling back-to-back a ``R-Phi'' module and a special ``Stereo''
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module with the sensor tilted by $100\mrad$ with respect to the other.
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The stereo sensor and electronics are identical to the R-Phi ones, the only
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difference being in the support mechanics and pitch adapters. \\
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%The stereo module just
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%differ from the $r\phi$ one in the details needed to cope with the
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%different sensor orientation.
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\begin{table}[!htb]
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\begin{center}
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\caption[smallcaption]{Details on the different TIB/TID modules. }
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\label{table:modules}
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%\begin{tabular}{|l||c|c|c|c|c|c|c|}
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\begin{tabular}{|l|ccccc|}
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\hline
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Module & pitch ($\mu$m) & Assembly &Active area & \# of APVs & \# of channels \\
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type & & type &$cm^2$ & & per module \\
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\hline
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% \hline
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TIB Layer 1-2 $r-/phi$ & 80 & DS & 35 & 6 & 768 \\
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TIB Layer 1-2 stereo & 80 & DS & 35 & 6 & 768 \\
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TIB Layer 3-4 $r-/phi$ & 120 & SS & 35 & 4 & 512 \\
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TID Ring 1 $r-/phi$ & 81-119 & DS & 85 & 6 & 768 \\
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TID Ring 1 stereo & 81-119 & DS & 85 & 6 & 768 \\
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TID Ring 2 $r-/phi$ & 81-119 & DS & 88 & 6 & 768 \\
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TID Ring 2 stereo & 81-119 & DS & 88 & 6 & 768 \\
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TID Ring 3 $r-/phi$ & 123-158 & SS & 79 & 4 & 512 \\
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\hline
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\end{tabular}
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\end{center}
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\end{table}
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%%{\bf FIX ME: descrizione/tabella dei vari tipi di moduli.}
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%The readout chip
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%pitch (44$\mu$m) is matched to the sensor pitch via an aluminum deposited glass substrate
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%fanout circuit (pitch
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%adapter). The hybrid circuit, which houses the front-end chips and ancillary
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%electronics, is realized using kapton multilayer technology integrating the power and
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%signal cables. \\
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A single sided module of the TID ring 3 and a TIB double-sided module
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are shown in Fig.~\ref{fig:moduleds}.
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%\begin{figure}[!htb]
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%\begin{center}
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% \includegraphics[width=0.60\textwidth]{Figs/moduless.pdf}
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%\end{center}
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%\caption{A 4 chips TIB single sided module mounted on its transportation carrier.}
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%\label{fig:moduless} % Give a unique label
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%\end{figure}
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\begin{figure}[!htb]
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\begin{center}
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\includegraphics[width=0.3\textwidth, height=0.45\textwidth,angle=90]{Figs/module-R1.pdf}
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\hskip 5mm
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\includegraphics[height=0.3\textwidth, width=0.45\textwidth]{Figs/moduleds.pdf}
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\end{center}
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\caption{A ring 3 TID module (left panel). A TIB double-sided assembly,
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the ``stereo'' module is visible reflected by a mirror (rigth panel).}
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\label{fig:moduleds} % Give a unique label
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\label{fig:moduletid}
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\end{figure}
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%\subsection{The Front-end Electronics}
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The multilayer kapton hybrid circuit holds the module front-end
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electronics consisting of four main components: the readout chips
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(APV25) and three ASICs (the Multiplexer, the PLL and the DCU). All
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devices are addressed and controlled by a I$^2$C serial bus~\cite{ref:i2c}.\\
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The signals coming from each strip are processed by four or six front-end
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readout chips, connected to the silicon sensor strips by means of a glass
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substrate pitch-adapter. The APV25~\cite{ref:apv}
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is a 128 channel chip built in radiation tolerant 0.25 $\mu$m
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CMOS technology~\cite{ref:radtol}. Each channel consists of a
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preamplifier coupled to a CR-RC 50ns shaper. The shaper output is sampled at 40MHz into
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a 192 cells pipeline that allows trigger latencies up to 4$\mu$s.\\
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The APV25 can operate in {\it peak mode} or in {\it deconvolution
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mode}. In the former the shaping time is $50\ns$; in the latter, by
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using a deconvolution filter~\cite{ref:deconvolution}, the
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effective shaping time is 25ns. In addition, there is also the
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possibility to switch on or off an inverter stage which slightly
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decreases the common mode noise contribution.
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% Standard operation mode for Silicon Sensor is with
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% inverter on.
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%%{\bf FIX ME: ma serve??? Nel seguito non si fa mai menzione dei vari
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%% modi di funzionamento dell'APV - forse da aggiungere nela
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%% descrizione del ped-noi run?}
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On receiving a level 1 trigger the APV25 sends out serially
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%, at 20MHz rate,
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the 128 analogue signals together with information about the
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pipeline address and the chip error status; two APV25 are multiplexed
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on a differential line by the Multiplexer chip~\cite{ref:mux}.
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In absence of data to stream out, for synchronization purposes, the
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APV25 issues a 25ns pulse called ``tick mark''
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with a period of 70 clock cycles.\\
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The Phase Locked Loop (PLL) chip~\cite{ref:pll} allows the clock to be delayed by 1.04ns
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steps, to
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compensate for path differences of control signals and for any
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electronics delay. The PLL also decodes the trigger signals that are
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encoded on the clock line.\\
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The Detector Control Unit (DCU)~\cite{ref:dcu} contains an eight-channel ADC,
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two constant current sources and a temperature sensor. It
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monitors two sets of thermistors, one on the sensor
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and one on the hybrid, its own internal temperature, the
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silicon sensor bias current and the two (1.25 V and
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2.5 V) low voltages. Each DCU has a unique hardware identification
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number (called \textit{DCU Hardware ID}) that can also be read through
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the $I^2C$ interface. By means of this number each module has an
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unique identification.
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\subsection{The Analog Opto Hybrid}
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The Analog-Opto Hybrids~\cite{ref:aoh} (AOH) performs the
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electrical-to-optical conversion of the electrical signals of the two
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or three APV25 pairs, depending on the module type, by means of
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radiation tolerant lasers and components\cite{ref:laserdriver}.
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There is one AOH
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per module, sitting on a ledge glued on the cooling pipe very close to
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the front-end hybrid. Multi-mode optical fibers~\cite{ref:opto}
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transport the signal to the counting room where the FEDs~\cite{ref:fed}
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convert back the signal to an electrical one and digitize it.
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Each AOH has two or three two meter long pig-tail
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optical fibres ending with an optical plug.\\
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The electrical signals arrive to the AOH through front-end hybrid
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kapton cable. The AOH is powered by the same cable.
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By means of the AOH control logic the laser working parameters GAIN
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and BIAS can be set via $I^2C$ control registers.
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The GAIN parameter can be used to compensate the loss of signal
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on the optical link to the FED input. The GAIN parameter has four
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possible values, 0, 1, 2, 3, corresponding to a nominal
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gain value of 0.5, 0.75, 1, 1.25, respectively.
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During normal operation, if no damage was done to the line and
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ideal connections, it is normally set to 1.
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The BIAS parameter regulates the current threshold for the laser
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diodes and can be set in the range 0$\div$127. The optimal value
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strongly depends on temperature and also on irradiation.
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\subsection{The Control Ring}
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\label{fig:ctrlring}
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The control of the modules front-end electronic is implemented by means of a
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hierarchical structure organized in groups of modules~\cite{ref:dohm}. Each group is
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controlled by a Communication and Control Unit (CCU) taht represents a
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``node'' in a ``token-ring'' formed by several daisy-chained CCUs and
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known as {\it control ring}. The control ring is mastered by a Front End
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Controller, FEC~\cite{ref:opto}, located outside the experiment by
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means of optical signals. The entire TIB and TID contains a total of 110
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Control Rings.
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\begin{description}
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\item[Digital Opto Hybrid Module] The FEC optical signals are converted into electrical signals by two DOHs
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(Digital Opto-Hybrid) that send clock, trigger, and control signals to
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the token ring of CCUs. The DOHs are physically located on a board,
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Digital Opto Hybrid Module~\cite{ref:dohm} (DOHM), that provides up to
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15 ports (7 on the main DOHM board plus 8 on its
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secondary extension or AUX) to implement the token ring. Each port
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connects the DOHM to a CCU located on the Mother Cable head
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via a 26 poles flat cable.
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To cope with possible CCU failures that would affect the entire ring, the
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control ring features the so called {\it redundancy} by means of
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a {\it double path} layout, shown in Fig.~\ref{fig:redundancy}.
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This design exploits the
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two input/output replicas of the CCUs: each CCU is connected to the
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two nearby CCUs through the primary circuit (``A'') and to the second
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next CCUs through the secondary circuit (``B'') by which a failing CCU
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can be bypassed. To cope with the failure either of the last
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CCU or of the primary DOH (A), the DOHM holds a ``dummy CCU'' and a
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spare DOH (B).
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\begin{figure}
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\begin{center}
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\includegraphics[width=0.85\textwidth]{Figs/default_redundancy.pdf}
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\end{center}
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\caption{Scheme of primary and secondary circuit of the ring. }
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\label{fig:redundancy}
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\end{figure}
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If no CCU is connected to a given DOHM port, a special loop-back plug
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must be inserted in order to ensure the continuity of the primary
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and secondary control circuits.
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%The redundancy properties of the system
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%are preserved by observing two ``rules'', i.e. a) if an even number of plugs is needed,
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%plugs must be organized in pairs, each pair having the two plugs inserted in consecutive ports, b)
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%if an odd number of plugs is needed, one plug must be placed in the last DOHM port
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%(before the dummy CCU), and the remaining ones following the previous rule.
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\item[CCU] The CCU serves a group of modules and performs the following tasks:
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distributes the clock/trigger and the hard reset to the modules;
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dispatches the instructions received from the
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FEC to the modules APV25s and the other ASICS via $I^2C$ or
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vice-versa, i.e. addresses the readings from the $I^2C$ devices to the FEC.
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Each CCU device sits on a CCU-Module (or CCUM) which carries also
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buffering chips and a DCU. Each CCU has an hardware address
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configurable by means of appropriate solder pads on the CCUM board to
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be shorted or not by a SMD pull up resistor.
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%either directed to themselves or to the devices connected to them. The first case is used
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%for example to read the Status Register of the CCU or to raise its output PIA reset lines.
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%While in the latter case
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%commands are translated to the $I^2C$ protocol and forwarded to the
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%other devices located on the sensor modules or AOH; in case of
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%a reply from the $I^2C$ device, the reverse process is done by the CCU, which addresses the
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%information to the FEC.
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\end{description}
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\subsection{The Mother Cable}
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The electrical connections between a group of modules served by the
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same CCU are done by the {\it Mother Cable}~\cite{ref:mc}, a
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multi-layer kapton copper circuit. An example is shown in
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Fig.~\ref{fig:fotomc}. The mother cable is mounted on the carbon fiber
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support structure underneath the modules.
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The mother cable holds a CCUM and distributes the $I^2C$ serial data (SDA)
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and clock (SCL) lines, the hard reset (PIA reset) line and the
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clock/trigger to each module.
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The mother cable is connected to a Power Supply unit via two sockets
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located at the edge and feeds the modules with low voltages (1.25~V,
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2.5~V) and the high voltage.
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In the TIB the mother cable coincides
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with the string, i.e. six modules
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(three double sides assemblies) in L1 and L2 and three modules in L3
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and L4. In the TID each mother cable serves a 90-degrees sector,
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i.e. six modules (three double-sided assemblies) in R1 and R2 and
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five modules in R3.
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\begin{figure}
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\begin{center}
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\includegraphics[width=0.85\textwidth]{Figs/mothercable.pdf}
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\end{center}
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\caption{A TIB mother cable with module connectors and CCU (top);
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details of the CCU and the connectors at the edge of the MC
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(middle); three module assembled string (bottom).}
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\label{fig:fotomc}
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\end{figure}
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|
